View MB88146A_369590.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13513-1E
Linear IC Converter
CMOS
D/A Converter for Digital Tuning
(12-channel, 8-bit, on-chip OP amp., low-voltage)
MB88146A
s DESCRIPTION
The MB88146A is an 8-bit D/A converter with twelve built-in channels. The 12 analog outputs each have a builtin OP amplifier with large current drive-capability. The data input/output format is CS (chip select) with serial bus connection available. A built-in 12-bit I/O expander enables serial parallel conversion (8 of the 12 bits can also be used for analog output). This product can be used for microcontroller port expansion, electronic level adjustment, replacement of semifixed resistance for tuning, etc.
s FEATURES
* * * * * * * * * * * * Ultra low power consumption (1.2 mW/chl: typical) Ultra compact package Built-in 12-channel R-2R type 8-bit D/A converter Built-in 12-bit I/O expander (8 bits also function as analog output) Built-in analog output amplifier (sink current 1.0 mA maximum, source current 1.0 mA maximum) Built-in power-on detection circuit (initialized at detection of VccD power-on) MCU interface compatible with 3 V to 5 V systems Power divided into MCU interface power supply (VccD) and OP amplifier power supply (VccA), D/A converter power supply (VccD) Analog output capability from 0 V to VccA Serial data I/O operates to maximum of 2.5 MHz (in cascade connection, up to 2.5 MHz when VccD = 5 V, up to 1.5 MHz when VccD = 3 V) CMOS process Choice of two packages: SDIP-24 pin and SSOP-24 pin.
s PACKAGES
24-pin Plastic DIP 24-pin Plastic SSOP
(DIP-24P-M02)
(FPT-24P-M03)
MB88146A
s PIN ASSIGNMENT
(TOP VIEW)
AO1 AO2 AO3 AO4 D11/AO5 D10/AO6 D9/AO7 D8/AO8 D7/AO9 D6/AO10 D5/AO11 D4/AO12
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND VCCA CS SO SI CLK D0 D1 D2 D3 VCCD VDD
DIP-24, SSOP-24
2
MB88146A
s PIN DESCRIPTION
Pin no. 1 to 4 5 to 12 Pin name AO1 to AO4 D11/AO5 to D4/AO12 Description D/A converter analog output pins (VDD to GND output). (Default: output #00 setting level) These pins may be used either as I/O expander parallel input/output (VCCA/ GND output 0.5 VCCA/0.2 VCCA input) or D/A converter analog output (VDD to GND output). Pin status is controlled by input data. See "sData Configuration". (Default: Input mode, Hi-Z state) D/A converter reference power pin. MCU interface power supply pin (power supply for I/O expander). I/O expander parallel input/output pins. (VCCD/GND output: When VCCD 4.0 V, 0.5 VCCD/0.2 VCCD input, When VCCD < 4.0 V, 2 V/0.2 VCCD input) Pin status is controlled by input data. See "sData Configuration." (Default: Input mode, Hi-Z state) Shift clock signal input pin. When CS = "L," SI data is loaded into the shift register at the rising edge of the shift clock. Data input pin (serial input pin). Used for 16-bit serial data input. Data output pin (serial output pin). The first bit (LSB) data of the 16-bit shift register is output simultaneously with the falling edge of the shift clock. When CS output = "H," this pin goes to high impedance state. Chip select signal input pin. Input to shift registers is enabled when the CS signal falling edges. Shift register contents can be executed when the CS signal rising edges. Analog unit power supply pin (OP amplifier power supply). Common GND pin. VDD.
13 14 15 to 18
VDD*1 VCCD*1 D3 toD0
19
CLK*2
20 21
SI*2 SO
22
CS*2
23 24
VCCA*1 GND
*1: Be sure that VCCA VCCD, and that VCCA *2: Do not leave this pin in floating state.
3
MB88146A
s BLOCK DIAGRAM
CS SI CLK VCCD DF DE DD DC 16-bit shift register and controller DB BA D9 D8 D7 D6 D5 D4 CNTL
SO
DF
DE
DD
DC
DB
BA
D9
D8 DF
D7 DE
D6
D5 D5
D4 D4 12
D0 D1 D2 D3
I/O expander
DF
D8
DF
D8
DF
D8
DF
D8
8-bit latch
8-bit latch
8-bit latch
8-bit latch
DF VDD
D8
DF
D8
DF
D8
DF
D8
R-2R rudder circuit
R-2R rudder circuit
R-2R rudder circuit
R-2R rudder circuit
GND
VCCA
-
+
-
+
-
+
-
+
8
AO1
AO4
D11/AO5
D4/AO12
4
MB88146A
s DATA CONFIGURATION
1. Data Configuration
MSB (last) LSB (first)
DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Setting data Channel select
2. Channel Select
D3 0 0 0 to 1 1 1 1 1 D2 0 0 0 to 0 1 1 1 1 D1 0 0 1 to 1 0 0 1 1 D0 0 1 0 to 1 0 1 0 1 Don't Care/special function AO1 selected AO2 selected to AO11 selected AO12 selected I/O expander (serial parallel) I/O expander (parallel serial) Expander status register (ESR) Function
5
MB88146A
3. Setting Data
* Don't Care/special function (Channel select = "0000") DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 x to x 0 0 0 to 1 1 x x x x to x 0 0 0 to 1 1 x x x x to x 0 0 0 to 1 1 x x x x to x 0 0 0 to 1 1 x x x x to x 0 0 0 to 1 1 x x x x to x 0 0 0 to 1 1 x x x x to x 0 0 1 to 1 1 x x x x to x 0 1 0 to 0 1 x x x 0 to 1 1 1 1 to 1 1 1 1 1 0 to 0 1 1 1 to 1 1 1 1 1 0 to 1 0 0 0 to 0 0 0 1 1 0 to 1 0 0 0 to 0 0 1 0 1 Analog output voltage level Don't Care Don't Care Don't Care GND (all channels) VDD/256 x 1 (all channels) VDD/256 x 2 (all channels) to VDD/256 x 254 (all channels) VDD/256 x 255 (all channels) Hi-Z (I/O expander state)* Reset (state when power is ON) Don't Care
x: Don't care *: Hi-Z output on all channels of AO5 through AO12 * D/A Converter (Channel select = "0001" to "1100") DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 0 0 0 0 to 1 1 1 x x to x 0 0 0 0 to 1 1 1 x x to x 0 0 0 0 to 1 1 1 x x to x 0 0 0 0 to 1 1 1 x x to x 0 0 0 0 to 1 1 1 x x to x 0 0 0 0 to 1 1 1 x x to x 0 0 1 1 to 0 1 1 x x to x 0 1 0 1 to 1 0 1 x x to x 0 0 0 0 to 0 0 0 0 0 to 1 0 0 0 0 to 0 0 0 0 0 to 1 0 0 0 0 to 0 0 0 0 1 to 1 0 0 0 0 to 0 0 0 1 0 to 1 GND VDD/256 x 1 VDD/256 x 2 VDD/256 x 3 to VDD/256 x 253 VDD/256 x 254 VDD/256 x 255 Hi-Z (I/O expander state)* Don't Care Don't Care Don't Care Analog output voltage level
x: Don't care *: Only AO5 through AO12 output is valid
6
MB88146A
* I/O Expander [Channel select = "1101"]: Serial Parallel Conversion Performs parallel conversion of data bits D4 to DF for output on pins D0 to D11. Note that only those pins designated for output in the ESR (expander status register) are output. Shift register DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Parallel I/O pins (output state) D11 D10
* I/O Expander [Channel select = "1110"]: Parallel Serial Conversion Writes data from D0 to D11 pins to bits D4 to DF in the shift register. Data is output to the SO pin on the shift clock (CLK) signal (The first 4 bits output data D0 to D3, so the converted output should be read as data bits 5 through 16.). Note that the data value is "0" for pins designated for output in the ESR (expander status register) as well as analog output pins. Shift register DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Parallel I/O pins (output state) D11 D10
* Expander Status Register [Channel select = "1111"] Shift register DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D11 D10 ESR
This register sets the status of each pin.
Setting "0" "1"
Pin status * Input standby status (Hi-Z output) * D11 to D4 pins used for analog output should be set to "0." * Output state
7
MB88146A
Note: After power VCCD is turned on, the state of pins and registers is as follows. Pin AO1 to AO4 D11/AO5 to D4/AO12 D3 to D0 Register Shift register D/A register Parallel output register All reset to "0." Not defined (retain prior state). "L" output Hi-Z state (input state) Hi-Z state (input state) State Bits DF to D8 are "0," and D7 to D0 are not defined (retain prior state). State
Expander status register (ESR) All reset to "0." * ESR settings have priority in determining pin states. Switching between input standby state and analog output state is enabled even when the ESR value is "1." When the ESR value returns to "0", the pin returns to its previously defined state. * In input standby state with AO set for Hi-Z output, the AO output setting can be used for transition to AO output state.
8
MB88146A
s ABSOLUTE MAXIMUM RATINGS
Parameter Symbol VCCA Power supply voltage Input voltage 1 Output voltage 1 Input voltage 2 Output voltage 2 Power consumption Operating temperature Storage temperature * : VCCA VCCD, VCCA VDD VCCD VDD Vin1 Vout1 Vin2 Vout2 PD Ta Tstg SI, CLK, CS, SO, D0 to D3 D4 to D11 -- -- -- Based on GND (Ta = +25C) Conditions Rating Min. -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -- -20 -55 Max. +7.0 VCCA* VCCA* VCCD + 0.3 VCCD + 0.3 VCCA + 0.3 VCCA + 0.3 250 +85 +150 Unit V V V V V V V mW C C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter Symbol VCCA VCCD Power supply voltage VDD GND Analog output current Oscillation limit output capacity Operation temperature IAL IAH COL Ta VCCA VCCA -- Source current Sink current -- -- Conditions -- VCCD VDD Value Min. 4.5 2.7 2.0 -- -- -- -- -20 Typ. 5.0 -- -- 0 -- -- -- -- Max. 5.5 VCCA VCCA -- 1.0 1.0 1.0 +85 Unit V V V V mA mA F C
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand.
9
MB88146A
s ELECTRICAL CHARACTERISTIC
1. DC Characteristics
(1) Digital section (VCCD Parameter Power supply voltage Power supply current Standby current Input leak current "H" level input voltage "L" level input voltage High-impedance leak current "H" level output voltage "L" level output voltage Symbol Pin name VCCD ICCD VCCD ICCS IILK1 VIH1 VIL1 IOLK VOH1 VOL1 SO SO, D0 to D3 CLK, SI, CS, D0 to D3 Conditions -- CLK =1 MHz, (Unloaded) CLK, SI, CS Stop Vin = VCCD or GND Vin = 0 to VCCD VCCD 4.0 V -- Vin = 0 to VCCD IOH = -0.4 mA IOL = 2.5 mA VCCD < 4.0 V Min. 2.7 -- -10 -10 0.5 x VCCD 2.0 -- -10 VCCD - 0.4 -- VCCA, Ta = -20C to +85C) Value Typ. 5.0 0.2 -- -- -- -- -- -- -- -- Max. 5.5 0.5 +10 +10 -- -- 0.2 x VCCD +10 -- 0.4 Unit V mA A A V V V A V V
(2) D/A converter section (VCCA = 5 V 10%, Ta = -20C to +85C) Parameter Power supply voltage Power supply current Resolution Monotonic increase Nonlinearity error Differential linearity error Nonlinearity error: Symbol VDD IDD Res Rem LE DLE Pin name VDD VDD VDD Conditions VCCA VCCA Value Min. 2.0 -- -- -- -1.5 -1.0 Typ. 5.0 1.2 8 8 -- -- Max. 5.5 2.5 -- -- +1.5 +1.0 Unit V mA bits bits LSB LSB
Unload VDD = VCCA - 0.1 V AO1 to AO12 Digital value: #06 to #FF
Analog output
Deviation (error) in input/output curves with respect to an ideal straight line connecting output voltage at "06" and output voltage at "FF." Deviation (error) in amplification with respect to theoretical increase in amplification per 1-bit increase in digital value.
Ideal straight line VAOH
Non linearity error
Differential linearity error:
VAOL
#06
#FF
Digital setting
Note: The value of VAOH and VDD, and the value of VAOL and GND are not necessarily equivalent.
10
MB88146A
(3) Operational Amplifier/Analog output section (VDD = VCCA = 5.0 V, Ta = -20C to +85C) Parameter Power supply voltage Power supply current Input leak current "H" level digital input voltage "L" level digital input voltage "H" level digital output voltage "L" level digital output voltage Analog output minimum voltage 1 Analog output minimum voltage 2 Analog output minimum voltage 3 Analog output minimum voltage 4 Analog output minimum voltage 5 Analog output maximum voltage 1 Analog output maximum voltage 2 Analog output maximum voltage 3 Analog output maximum voltage 4 Analog output maximum voltage 5 Symbol Pin name VCCA ICCA IILK2 VIH2 VIL2 VOH2 VOL2 VAOL1 VAOL2 VAOL3 VAOL4 VAOL5 VAOH1 VAOH2 VAOH3 VAOH4 VAOH5 AO1 to AO12 AO1 to AO12 D4 to D11 VCCA Conditions -- #80 setting (Unloaded) Vin = 0 to VCCA -- -- IOH = -0.4 mA IOL = 2.5 mA IAL = 0 A #00 setting IAL = 0.5 mA #00 setting IAH = 0.5 mA #00 setting IAL = 1.0 mA #00 setting IAH = 1.0 mA #00 setting IAL = 0 A #FF setting IAL = 0.5 mA #FF setting IAH = 0.5 mA #FF setting IAL = 1.0 mA #FF setting IAH = 1.0 mA #FF setting Value Min. 4.5 -- -10 0.5 x VCCA -- VCCA - 0.4 -- GND -0.2 GND -0.3 GND VCCA - 0.1 VCCA - 0.2 VCCA - 0.2 VCCA - 0.3 VCCA - 0.3 Typ. 5.0 1.0 -- -- -- -- -- -- GND -- GND -- -- -- VCCA -- VCCA Max. 5.5 3.7 +10 -- 0.2 x VCCA -- 0.4 0.1 0.2 0.2 0.3 0.3 VCCA VCCA VCCA + 0.2 VCCA VCCA + 0.3 Unit V mA A V V V V V V V V V V V V V V
Note: IAH: Analog output sink current IAL: Analog output source current
11
MB88146A
2. AC Characteristics
* For operation at VCCD = 5.0 V (VDD = VCCA = 5.0 V, Ta = -20C to +85C) Parameter Clock "L" level pulse width Clock "H" level pulse width Clock rise time Clock fall time Serial input setup time Serial input hold time Serial output delay time CS input setup time CS hold time CS "H" level hold time Data output enable time Data output float time Parallel input setup time Parallel input hold time Parallel output delay time Analog output delay time Power supply rise time Power-on reset non-startup power supply variation * For operation at VCCD = 3.0 V *1 (VCCD = 3.0 V, Ta = -20C to +85C) Parameter Serial output delay time Parallel output delay time Symbol tSOD tPOD Conditions See "Load condition 1"*2 See "Load condition 2"*
3
Symbol tCKL tCKH tCr tCf tSSU tSHD tSOD tCSU tCCH tCSH tSO tSOZ tPSU tPHD tPOD tAOD tR VR
Conditions -- -- -- -- -- -- See "Load condition 1" -- -- -- -- -- -- -- See "Load condition 1" See "Load condition 2" -- --
Value Min. 200 200 -- -- 30 60 0 100 200 100 -- -- 30 60 -- -- -- -10 Typ. -- -- -- -- -- -- 80 -- -- -- -- -- -- -- 100 30 -- -- Max. -- -- 200 200 -- -- 170 -- -- -- 200 200 -- -- 170 100 50 10
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s ms V/s
Value Min. 0 -- Typ. 120 120 Max. 300 300
Unit ns ns
*1: Items not listed are identical to characteristics for VCCD = 5.0 V. *2: Cascade connection enabled at 1.5 MHz. *3: Applied to D0 to D3 operating at VCCD. Load Conditions
* Load condition 1
Measurement point
* Load condition 2
Measurement point
CL = 20 pF to 100 pF
RAL = 10 k
CAL = 50 pF
12
MB88146A
* Input/Output Timing (CS method)
tCr CLK tCKL SI tSSU tCSU CS tSO SO tPSU D0 to D11 (For input) tPOD D0 to D11 (For output) tAOD 90 % AO1 to AO12 10 % tPHD tSOD tSOD tSOZ tSHD tCCH tCSH tCKH tCf
The decision level for CLK, SI, CS, SO, and D0 to D3 is 80% and 20% of VCCD. The decision level for D4 to D11 is 80% and 20% of VCCA, and for AO1 to AO12 is 90% and 10% of VCCA.
* Power Supply Timing * Power-On Timing
tR VCCD 2.0 V 0.2 V
* Power-On Reset Non-Startup Supply Variation
Upper limit, 5.5V
VCCD
V
V VR = V T
T 2.7V, lower limit
T
13
MB88146A
3. Analog Output Noise Characteristic
(VDD = VCCD = VCCA = 5.0 V, Ta = +25C) Parameter Digital supply noise reduction ratio Analog supply noise reduction ratio D/A supply noise reduction ratio Symbol PSRD PSRA PSRDA Conditions fNOISE = 1 kHz fNOISE = 1 kHz fNOISE = 1 kHz * During serial transfer * During analog operation * During Hi-Z commands. See "Operating Noise VN1." * Serial parallel conversion See "I/O Expander Operating Noise 1 VN2." During digital-only pin operation * During parallel serial conversion * ESR setting During digital input/digital output switching * During serial parallel conversion See "I/O Expander Operating Noise 2 VN3." During digital/analog capable pin operation * ESR setting During digital output/digital output switching Value Measurement Unit condition Min. Typ. Max. 1 1 1 -- -- -- -- -- -- 20 20 0 dB dB dB
Operating noise
VN1
2
-30
--
30
mV
I/O expander operating noise 1
VN2
2
-30
--
30
mV
I/O expander operating noise 2
VN3
2
-0.1
--
0.1
V
* Measurement condition 1
* Measurement condition 2
VCCD = 5.0 V,VCCA = 5.0 V,VDD = 5.0 V
VCCD,VCCA,VDD
Measurement point AO DUT CAL = 30 pF Pattern input AO DUT
Measurement point
Input wave form Sine wave
Offset Amplitude Temperature Frequency
5.0 V 0.1 V 25C 1 kHz
CLK = 2.5 MHz SI CS
CAL = 30 pF
14
MB88146A
* Analog Output Noise Description * Output Noise VN1
Noise to analog output during serial data transfer, analog operation, Hi-Z commands.
CLK
SI Analog operation commands, Hi-Z commands
CS
AOx D11/AO5 to D0/AO12 AO1 to AO12 * Hi-Z state = digital input state.
Analog output
Digital input* analog output
VN1 VN1
* I/O Expander Operation Noise 1 VN2
Noise to analog output during parallel serial conversion commands, serial parallel conversion command for digital-only pins, or ESR setting commands for switching between digital input and digital output.
CLK
SI Parallel serial conversion, serial parallel conversion, ESR setting commands CS D3 to D0 D11 to D0 AO1 to AO12
Parallel output
Digital input digital output
VN2 VN2
(Continued)
15
MB88146A
(Continued)
* I/O Expander Operation Noise 2 VN3
Noise to analog output during serial parallel switching commands for digital-only pins, or ESR setting commands for switching between digital output and analog output.
CLK
SI Serial parallel switching commands, ESR setting commands
CS
D11 to D4 D11/AO5
Parallel output
Digital output analog output D0/AO12 AO1 to AO12 VN3 VN3
16
MB88146A
s DATA INPUT/OUTPUT TIMING
MB88146A Data Input/Output Timing (Serial Bus Format)
* D/A converter operation, and I/O expander (serial parallel conversion) operation, and ESR writing operation.
SI
D0
D1
D2
DE
DF
CLK
1
2
3
15
16
CS
AOx
Dxx
SO
Data input is enabled at the falling edge of the CS signal. 16-bit data is input, and the shift register command is executed at the rising edge of CS. In D/A converter operation, the analog output selected at the rising edge of CS is the conversion result. In serial parallel conversion, the digital output selected at the rising edge of CS is the conversion result. In ESR write operation, ESR data is set and pin status determined at the rising edge of CS. * I/O expander (parallel serial conversion) operation
SI
D0
DF
CLK
1
16
1
2
16
CS
Dxx
Retrieved parallel data
SO
D0
DF
Parallel-to-serial Conversion result output
Data input is enabled at the falling edge of the CS signal. 16-bit data (parallel serial conversion commands) is input and commands accepted at the rising edge of CS. At the falling edge of CS, data from the parallel input is loaded into bits D4 to DF of the shift register, and output from the SO pin timed to the falling edge of the CLK signal. 17
MB88146A
s USAGE PRECAUTIONS
1. Preventing Latch-Up
A condition known as "latch-up" may occur when the input or output pins of a CMOS IC device are exposed to voltages higher then VCCD or VCCA or lower than GND voltage, or when voltages are applied to the device in excess of rated values for VCCD, VccA, or VDD to GND voltages. Latchup produces a rapid increase in power supply current, and may result in thermal destruction of elements. Users should take sufficient precautions to ensure that absolute maximum ratings are not exceeded at any time during use.
2. Power Supply Pins
The power supply should be connected to the VCCD, VCCA, VDD, and GND terminals of the MB88146A with as low an impedance as possible. In addition, it is recommended that ceramic capacitors or approximately 0.1 F be connected as bypass capacitors between the VCCD, VCCA, and VDD terminals and the GND terminals.
s ORDERING INFORMATION
Part number MB88146AP MB88146APFV Package 24-pin Plastic DIP (DIP-24P-M02) 24-pin Plastic SSOP (FPT-24P-M03) Remarks
18
MB88146A
s PACKAGE DIMENSIONS
24-pin Plastic DIP (DIP-24P-M02)
30.20 -0.30 1.189 -.012
+0.20
+.008
INDEX-1 13.550.25 (.533.010)
INDEX-2
0.51(.020)MIN
4.96(.195) MAX
3.00(.118) MIN 0.98 .039 1.27(.050) MAX
C
+0.50 -0 +.020 -0
0.250.05 (.010.002) 1.50 .059 2.54(.100) TYP
+0.50 -0 +.020 -0
0.450.08 (.018.003)
15.24(.600) TYP
15MAX
1994 FUJITSU LIMITED D24015S-2C-3
Dimensions in mm (inches)
24-pin Plastic SSOP (FPT-24P-M03)
* 7.750.10(.305.004)
* : These dimensions do not include resin protrusion.
1.25 -0.10 +.008 .049 -.004
+0.20
Mounting height
0.10(.004)
* 5.600.10
INDEX (.220.004)
7.600.20 (.299.008)
6.60(.260) NOM
0.650.12(.0256.0047)
0.22 -0.05 +.004 .009 -.002
+0.10
"A"
0.15 -0.02 +.002 .006 -.001
+0.05
Details of "A" part 0.100.10(.004.004) (STAND OFF)
7.15(.281)REF
0
10
0.500.20 (.020.008)
C
1994 FUJITSU LIMITED F24018S-2C-2
Dimensions in mm (inches)
19
MB88146A
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F9811 (c) FUJITSU LIMITED Printed in Japan

▲Up To Search▲

Price & Availability of MB88146A

	To Download MB88146A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .